View Z86C64_1338866.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PRELIMINARY
Z86C63/64 CPS DC-5461-02
PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
Z86C63/64
CMOS Z8(R) 32K ROM MICROCONTROLLER
GENERAL DESCRIPTION
The Z86C63/64 microcontroller introduces a new level of sophistication to single-chip architecture. The Z86C63/64 is a member of the Z8 single-chip microcontroller family with 32 Kbytes of ROM and 256 bytes of RAM. The Z86C63 is housed in a 40-pin DIP, and a 44-pin PLCC package, and is manufactured in CMOS technology. The ROMless pin option is available on the 44-pin version only. The Z86C64 is housed in a 64-pin DIP, and a 68-pin PLCC. Both versions of the Z86C64 have the ROMless pin option, which allows both external memory and preprogrammed ROM, enabling this Z8 microcontroller to be used in highvolume applications or where code flexibility is required. The Z86C96 ROMless Z8 will support the Z86C63/64. Zilog's CMOS microcontroller offers fast execution, more efficient use of memory, more sophisticated interrupts, input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and low power consumption. The Z86C63/64 architecture is characterized by Zilog's 8-bit microcontroller core. The device offers a flexible I/O scheme, an efficient register and address space structure, multiplexed capabilities between address/data, I/O, and a number of ancillary features that are useful in many industrial and advanced scientific applications. For applications which demand powerful I/O capabilities, the Z86C63 fulfills this with 32 pins dedicated to input and output. These lines are grouped into four ports with eight lines each. The Z86C64 has 52 pins for input and output, and these lines are grouped into six, 8-bit ports and one 4-bit port. Each port is configurable under software control to provide timing, status signals, serial or parallel I/O with or without handshake, and an address/data bus for interfacing external memory. There are three basic address spaces available to support this wide range of configurations: Program Memory, Data Memory, and 236 General-Purpose Registers. To unburden the program from coping with the real-time problems such as counting/timing and serial data communication, the Z86C63/64 offers two on-chip counter/timers with a large number of user selectable modes, and an asynchronous receiver/transmitter (UART) (see Block Diagrams).
Notes: All Signals with a preceding front slash, "/", are active Low, e.g., B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS
DC-5461-02 (12-13-93)
1
PRELIMINARY
Z86C63/64 CPS DC-5461-02
GENERAL DESCRIPTION
Output Input Vcc GND XTAL /AS /DS R//W /RESET
Port 3
Machine Timing and Instruction Control
UART
ALU
Counter/ Timers (2)
FLAGS
Prg. Memory 32,768 x 8-Bit
Interrupt Control
Register Pointer Register File 256 x 8-Bit Program Counter
Port 2
Port 0
Port 1
4 I/O (Bit Programmable)
4
8 Address/Data or I/O (Byte Programmable)
Address or I/O (Nibble Programmable)
Z86C63 Functional Block Diagram
2
PRELIMINARY
Output Input Vcc GND XTAL
Z86C63/64 CPS DC-5461-02
/AS /DS R//W /RESET
Port 3
Machine Timing and Instruction Control
UART
ALU
Flags Counter/ Timers (2) Register Pointer Interrupt Control Register File 256 x 8-Bit
Program Memory 32,768 x 8-Bit
Program Counter
Port 6
Port 5
Port 4
Port 2 4 I/O (Bit Programmable)
Port 0 4
Port 1 8 Address/Data or I/O (Byte Programmable)
I/O (Bit Programmable)
Address or I/O (Nibble Programmable)
Z86C64 Functional Block Diagram
3
PRELIMINARY
Z86C63/64 CPS DC-5461-02
PIN DESCRIPTION
Z86C63 40-Pin DIP Pin Identification
VCC XTAL2 XTAL1 P37 P30 /RESET R//W /DS /AS P35 GND P32 P00 P01 P02 P03 P04 P05 P06 P07 1 2 3 4 5 6 7 8 9 10 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 P36 P31 P27 P26 P25 P24 P23 P22 P21 P20 P33 P34 P17 P16 P15 P14 P13 P12 P11 P10
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13-20 21-28 29 30 31-38 39 40
Symbol VCC XTAL2 XTAL1 P37 P30 /RESET R//W /DS /AS P35 GND P32 P07-P00 P17-P10 P34 P33 P27-P20 P31 P36
Function Power Supply Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pin 7 Port 3, Pin 0 Reset Read/Write Data Strobe Address Strobe Port 3, Pin 5
Direction Input Output Input Output Input Input Output Output Output Output
Z86C63 11 DIP
12 13 14 15 16 17 18 19 20
Ground Input Port 3, Pin 2 Input Port 0, Pins 0,1,2,3,4,5,6,7 In/Output Port 1, Pins 0,1,2,3,4,5,6,7 In/Output Port 3, Pin 4 Output Port 3, Pin 3 Input Port 2, Pins 0,1,2,3,4,5,6,7 In/Output Port 3, Pin 1 Input Port 3, Pin 6 Output
Z86C63 40-Pin DIP Pin Assignments
4
PRELIMINARY
XTAL1 XTAL2
Z86C63/64 CPS DC-5461-02
VCC
P30
P37
P36
P31
P27
P26
6 /RESET R//W /DS /AS P35 GND P32 P00 P01 P02 /ROMless 7 8 9 10 11 12 13 14 15 16 17
5
4
3
2
1 44 43 42 41 40 39 38 37 36 35 N/C P24 P23 P22 P21 P20 P33 P34 P17 P16 P15
Z86C63 PLCC
P25
N/C
34 33 32 31 30 29
18 19 20 21 22 23 24 25 26 27 28
P03 P04 P05 P06 P07 P10 P12 P13 P14 P11 N/C
Z86C63 44-Pin PLCC Pin Assignments Z86C63 44-Pin PLCC Pin Identification Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14-16 Symbol VCC XTAL2 XTAL1 P37 P30 N/C /RESET R//W /DS /AS P35 GND P32 P02-P00 Function Power Supply Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pin 7 Port 3, Pin 0 Not Connected Reset Read/Write Data Strobe Address Strobe Port 3, Pin 5 Ground Port 3, Pin 2 Port 0, Pins 0,1,2 Direction Input Output Input Output Input Input Input Output Output Output Output Input Input In/Output Pin # 17 18-22 23-27 28 29-31 32 33 34-38 39 40-42 43 44 Symbol /ROMless P07-P03 P14-P10 N/C P17-P15 P34 P33 P24-P20 N/C P25-P27 P31 P36 Function ROM/ROMless control Port 0, Pins 3,4,5,6,7 Port 1, Pins 0,1,2,3,4 Not Connected Port 1, Pins 5,6,7 Port 3, Pin 4 Port 3, Pin 3 Port 2, Pins 0,1,2,3,4 Not Connected Port 2, Pins 5,6,7 Port 3, Pin 1 Port 3, Pin 6 Direction Input In/Output In/Output Input In/Output Output Input In/Output Input In/Output Input Output
5
PRELIMINARY
Z86C63/64 CPS DC-5461-02
PIN DESCRIPTION (Continued)
Z86C64 64-Pin DIP Pin Identification
P44 VCC P45 XTAL2 XTAL1 P37 P30 N/C /RESET R//W /DS P46 P47 /AS P35 /ROMless GND P32 P50 P51 P00 P01 P02 P03 P04 P05 P06 P07 VCC P52 P53 P54 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 P43 P42 P36 P31 P41 P40 P27 P26 P25 P24 P23 P22 P60 P61 P21 P20 GND P33 P34 P62 P63 P17 P16 P15 P14 P13 P12 P57 P56 P11 P10 P55
Pin # 1 2 3 4 5 6 7 8 9 10 11 12-13 14 15 16 17 18 19-20 21-28 29 30-33 34-35 36-37 38-43 44-45 46 47 48 49-50 51-52 53-58 59-60 61 62 63 64
Symbol P44 VCC P45 XTAL2 XTAL1 P37 P30 N/C /RESET R//W /DS P47-P46 /AS P35
Function Port 4, Pin 4 Power Supply Port 4, Pin 5 Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pin 7 Port 3, Pin 0 Not Connected Reset Read/Write Data Strobe Port 4, Pin 6,7 Address Strobe Port 3, Pin 5
Direction In/Output Input In/Output Output Input Output Input Input Input Output Output In/Output Output Output Input Input Input In/Output In/Output Input In/Output In/Output In/Output In/Output In/Output Output Input Input In/Output In/Output In/Output In/Output Input Output In/Output In/Output
Z86C64 DIP
49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
/ROMless ROM/ROMless control GND Ground P32 Port 3, Pin 2 P51-P50 Port 5, Pin 0,1 P07-P00 VCC P52-P55 P11-P10 P57-P56 P17-P12 P63-P62 P34 P33 GND P21-P20 P61-P60 P27-P22 P41-P40 P31 P36 P42 P43 Port 0, Pins 0,1,2,3,4,5,6,7 Power Supply Port 5, Pins 2,3,4,5 Port 1, Pins 0,1 Port 5, Pins 6,7 Port 1, Pins 2,3,4,5,6,7 Port 6, Pins 3,2 Port 3, Pin 4 Port 3, Pin 3 Ground Port 2, Pins 0,1 Port 6, Pins 1,0 Port 2, Pins 2,3,4,5,6,7 Port 4, Pins 0,1 Port 3, Pin 1 Port 3, Pin 6 Port 4, Pin 2 Port 4, Pin 3
Z86C64 64-Pin DIP Pin Assignments
6
PRELIMINARY
es et P3 0 P3 7 XT AL 1 XT AL P4 2 5
Z86C63/64 CPS DC-5461-02
VC C P4 4 P4 3 P4 2 P3 6 P3 1 P4 1 P4 0 P2 7
P2 6
/R
9 R//W /P0DS /DS P46 P47 /P1DS /AS /DTimers P35 /ROMless GND P32 P50 P51 P00 P01 P02 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 P24 P23 P22 P60 P61 P21 P20 SCLK /SYNC GND P33 P34 P62 P63 P17 P16 P15
Z86C64 PLCC
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
5 P0 6 P0 7 VC C P5 2 3 P5 4 P5 5 P1 0 P1 1 P5 6 3 4 7 P1 2 P1 3 4 P1
P0
P0
P5
P0
Z86C64 68-Pin PLCC Pin Assignments
P5
P2 5
53 52 51 50 49 48 47 46 45 44
7
PRELIMINARY
Z86C63/64 CPS DC-5461-02
PIN DESCRIPTION (Continued)
Z86C64 68-Pin PLCC Pin Identification Pin # 1-2 3 4 5 6 7 8 9 10 11 12 13-14 15 16 17 18 19 20 21 22-23 Symbol P44-P43 VCC P45 XTAL2 XTAL1 P37 P30 /RESET R//W /P0DS Function Port 4, Pins 3,4 Power Supply Port 4, Pin 5 Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pin 7 Port 3, Pin 0 Reset Read/Write Port 0 Data Strobe Direction In/Output Input In/Output Output Input Output Input Input Output Output Output In/Output Output Output Input Output Input Input Input In/Output Pin # 24-31 32 33-36 37-38 39-40 41-46 47-48 49 50 51 52 53 54-55 56-57 58-63 64-65 66 67 68 Symbol P07-P00 VCC P55-P52 P11-P10 P56-P57 P17-P12 P63-P62 P34 P33 GND /SYNC SCLK P21-P20 P60-P61 P27-P22 P41-P40 P31 P36 P42 Function Direction
Port 0, Pins 0,1,2,3,4,5,6,7 In/Output Power Supply Input Port 5, Pins 2,3,4,5 In/Output Port 1, Pins 0,1 In/Output Port 5, Pins 6,7 Port 1, Pins 2,3,4,5,6,7 Port 6, Pins 3,2 Port 3, Pin 4 Port 3, Pin 3 Ground Synchronization System Clock Port 2, Pins 0,1 Port 6, Pins 1,0 Port 2, Pins 2,3,4,5,6,7 Port 4, Pins 0,1 Port 3, Pin 1 Port 3, Pin 6 Port 4, Pin 2 In/Output In/Output In/Output Output Input Input Output Output In/Output In/Output In/Output In/Output Input Output In/Output
/DS Data Strobe P47-P46 Port 4, Pins 6,7 /P1DS Port 1, Data Strobe /AS Address Strobe /DTIMER DTIMER P35 /ROMless GND P32 P51-P50 Port 3, Pin 5 ROM/ROMless control Ground Port 3, Pin 2 Port 5, Pins 0,1
8
PRELIMINARY
Z86C63/64 CPS DC-5461-02
ABSOLUTE MAXIMUM RATINGS
Symbol VCC TSTG TA Description Min Max +7.0 +150 Units V C Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period may affect device reliability.
Supply Voltage* -0.3 Storage Temp -65 Oper Ambient Temp
Notes: * Voltages on all pins with respect to GND. See ordering information
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to GND. Positive current flows into the referenced pin (Test Load).
From Output Under T est
I
150 pF
Test Load Diagram
9
PRELIMINARY
Z86C63/64 CPS DC-5461-02
DC ELECTRICAL CHARACTERISTICS Z86C63
TA = 0C to +70C Min Max 0.85 VCC VSS - 0.3 2 VSS - 0.3 2.4 7 VCC + 0.3 0.8 VCC + 0.3 0.2 VCC TA = -40C to +105C Min Max 0.85 VCC VSS - 0.3 2 VSS - 0.3 2.4 2.4 0.4 0.4 0.6 0.6 VCC + 0.3 0.2 VCC 2 2 -180 35 40 15 20 20 24 30 4.0 4.5 0.8 5 5 7 VCC + 0.3 0.8 VCC + 0.3 0.2 VCC VCC - 100 mV Typical at 25C
Sym Parameter VCH VCL VIH VIL VOH VOH VOH VOL VOL VOL VOL VRH VRl IIL IOL IIR ICC ICC ICC ICC1 ICC1 ICC2 IALL Max Input Voltage Clock Input High Voltage Clock Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage
Units V V V V V V V V V V V V V V A A A mA mA mA mA mA A A
Conditions [4] IIN < 250 A Driven by External Clock Generator Driven by External Clock Generator
IOH = -2.0 mA IOH = -100 A IOH = -0.5 mA IOL = +5.0 mA [3] IOL = +2.0 mA [3] IOL = +4.0 mA [2] IOL = +1.0 mA [2]
Output High Voltage VCC - 100 mV Output High Voltage (Low EMI) 2.4 Output Low Voltage 0.4 Output Low Voltage (Low EMI) 0.4 Output Low Voltage 0.6 Output Low Voltage (Low EMI) 0.6 Reset Input High Voltage 0.85 VCC VCC + 0.3 Reset Input Low Voltage Input Leakage Output Leakage -0.3 -2 -2 0.2 VCC 2 2 -180 35 40 6.0 15 1.6 10 14
0.85 VCC -0.3 -2 -2
VIN = 0 V, VCC VIN = 0 V, VCC VRL = 0 V [1] @ 16 MHz [1] @ 20 MHz @ 4 MHz [1] HALT Mode VIN = 0 V, VCC @ 16 MHz @ 4 MHz [1] STOP Mode VIN = 0 V, VCC
Reset Input Current Supply Current (Standard Mode) Supply Current (Standard Mode) Supply Current (Low EMI) Standby Current (Standard Mode) Standby Current (Low EMI) Standby Current Auto Latch Low Current -14
-20
Notes: [1] All inputs driven to either 0V or VCC, outputs floating. [2] VCC = 3.0V to 3.6V [3] VCC = 4.5V to 5.5V [4] /Reset pin must be a maximum of VCC + 0.3V.
10
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS
R//W
13 12
Port 0, /DM
16 18 3
Port 1
1
A7 - A0
2
D7 - D0 IN
9
/AS
8 4 5 6 11
/DS (Read)
17
10
Port 1
A7 - A0
14
D7 - D0 OUT
15 7
/DS (Write)
17
External I/O or Memory Read/Write
11
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS External I/O or Memory Read and Write Timing Z86C63/64 (16 MHz--Standard Mode Only[4])
TA = 0C to +70C 16 MHz Min Max 25 35 150 40 0 135 80 75 0 50 35 25 35 25 35 210 45 25 45 25 80 75 0 50 35 25 35 25 35 210 40 0 135 TA = -40C to +105C 16 MHz Min Max 25 35 150
No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Symbol TdA(AS) TdAS(A) TdAS(DR) TwAS TdAZ(DS) TwDSR TwDSW TdDSR(DR) ThDR(DS) TdDS(A) TdDS(AS) TdR/W(AS) TdDS(R/W) TdDW(DSW) TdDS(DW) TdA(DR) TdAS(DS) TdDM(AS)
Parameter Address Valid to /AS rise Delay /AS rise to Address Float Delay /AS rise to Read Data Req'd Valid /AS Low Width Address Float to /DS fall /DS (Read) Low Width /DS (Write) Low Width /DS fall to Read Data Req'd Valid Read Data to /DS rise Hold Time /DS rise to Address Active Delay /DS rise to /AS fall Delay R//W Valid to /AS rise Delay /DS rise to R//W Not Valid Write Data Valid to /DS fall (Write) Delay /DS rise to Write Data Not Valid Delay Address Valid to Read Data Req'd Valid /AS rise to /DS fall Delay /DM Valid to /AS rise Delay
Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes [2,3] [2,3] [1,2,3] [2,3] [1,2,3] [1,2,3] [1,2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [1,2,3] [2,3] [2,3]
Notes: [1] When using extended memory timing add 2 TpC. [2] Timing numbers given are for minimum TpC. [3] See clock cycle dependent characteristics table. [4] Low EMI is not selected. Standard Test Load All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.
Clock Dependent Formulas Number 1 2 3 4 6 7 8 10 11 12 13 14 15 16 17 18 Symbol TdA(AS) TdAS(A) TdAS(DR) TwAS TwDSR TwDSW TdDSR(DR) TdDS(A) TdDS(AS) TdR/W(AS) TdDS(R/W) TdDW(DSW) TdDS(DW) TdA(DR) TdAS(DS) TdDM(AS) Equation 0.40 TpC + 0.32 0.59 TpC - 3.25 2.83 TpC + 6.14 0.66 TpC - 1.65 2.33 TpC - 10.56 1.27 TpC + 1.67 1.97 TpC - 42.5 0.8 TpC 0.59 TpC - 3.14 0.4 TpC 0.8 TpC - 15 0.4 TpC 0.88 TpC - 19 4 TpC - 20 0.91 TpC - 10.7 0.9 TpC - 26.3
12
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS External I/O or Memory Read and Write Timing Z86C63/64 (20 MHz--Standard Mode Only[4])
TA = 0C to +70C 20 MHz Min Max 15 25 120 30 0 105 65 55 0 40 25 20 25 20 25 150 35 15 35 15 65 55 0 40 25 20 25 20 25 150 30 0 105 TA = -40C to +105C 20 MHz Min Max 25 35 120
No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Symbol TdA(AS) TdAS(A) TdAS(DR) TwAS TdAZ(DS) TwDSR TwDSW TdDSR(DR) ThDR(DS) TdDS(A) TdDS(AS) TdR/W(AS) TdDS(R/W) TdDW(DSW) TdDS(DW) TdA(DR) TdAS(DS) TdDM(AS)
Parameter Address Valid to /AS rise Delay /AS rise to Address Float Delay /AS rise to Read Data Req'd Valid /AS Low Width Address Float to /DS fall /DS (Read) Low Width /DS (Write) Low Width /DS fall to Read Data Req'd Valid Read Data to /DS rise Hold Time /DS rise to Address Active Delay /DS rise to /AS fall Delay R//W Valid to /AS rise Delay /DS rise to R//W Not Valid Write Data Valid to /DS fall (Write) Delay /DS rise to Write Data Not Valid Delay Address Valid to Read Data Req'd Valid /AS rise to /DS fall Delay /DM Valid to /AS rise Delay
Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes [2,3] [2,3] [1,2,3] [2,3] [1,2,3] [1,2,3] [1,2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [1,2,3] [2,3] [2,3]
Notes: [1] When using extended memory timing add 2 TpC. [2] Timing numbers given are for minimum TpC. [3] See clock cycle dependent characteristics table. [4] Low EMI is not selected. Standard Test Load All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.
13
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS Additional Timing Diagram
1 3
Clock 2 7 7 2 3
TIN 4 6 5
IRQN 8 9
Additional Timing
AC CHARACTERISTICS Additional Timing Table Z86C63 (Standard Mode Only)
TA = 0C to +70C 20/16 MHz Min Max 50/62.5 1000 10 25/31 75 5 TpC 8 TpC 100 70 5 TpC 5 TpC TA = -40C to +105C 20/16 MHz Min Max 50/62.5 1000 10 25/31 75 5 TpC 8 TpC 100 50 5 TpC 5 TpC
No 1 2 3 4 5 6 7 8a 8b 9
Symbol TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin,TfTin TwIL TwIL TwIH
Parameter Input Clock Period Clock Input Rise & Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise and Fall Times Interrupt Request Input Low Times Interrupt Request Input Low Times Interrupt Request Input High Times
Units ns ns ns ns ns ns ns ns ns ns
Notes [1] [1] [1] [2] [2] [2] [2] [2,4] [2,5] [2,3]
Notes: [1] Clock timing references use 0.85VCC for a logic 1 and 0.8V for a logic 0. [2] Timing references use 2.0V for a logic 1 and 0.8V for a logic 0. [3] Interrupt references request through Port 3. [4] Interrupt request through Port 3 (P33-P31). [5] Interrupt request through Port 30.
14
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS Additional Timing Table Z86C63 (Low EMI Mode Only)
TA = 0C to +70C 4 MHz Min Max 250 125 75 3 TpC 4 TpC 100 70 3 TpC 3 TpC DC 10 TA = -40C to +105C 4 MHz Min Max 250 125 75 3 TpC 4 TpC 100 50 3 TpC 3 TpC DC 10
No 1 2 3 4 5 6 7 8a 8b 9
Symbol TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin,TfTin TwIL TwIL TwIH
Parameter Input Clock Period Clock Input Rise & Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise and Fall Times Interrupt Request Input Low Times Interrupt Request Input Low Times Interrupt Request Input High Times
Units ns ns ns ns ns ns ns ns ns ns
Notes [1] [1] [1] [2] [2] [2] [2] [2,4] [2,5] [2,3]
Notes: [1] Clock timing references use 0.85VCC for a logic 1 and 0.8V for a logic 0. [2] Timing references use 2.0V for a logic 1 and 0.8V for a logic 0. [3] Interrupt references request through Port 3. [4] Interrupt request through Port 3 (P33-P31). [5] Interrupt request through Port 30.
15
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC CHARACTERISTICS Handshake Timing Diagrams
Data In
Data In Valid
Next Data In Valid
1 3
2
/DAV (Input)
4
Delayed DAV
5
6
RDY (Output)
Delayed RDY
Input Handshake Timing
Data Out
Data Out Valid
Next Data Out Valid
7
/DAV (Output)
8 10 9
Delayed DAV
11
RDY (Input)
Delayed
RDY
Output Handshake Timing
16
PRELIMINARY
Z86C63/64 CPS DC-5461-02
AC ELECTRICAL CHARACTERISTICS Handshake Timing Table Z86C63
TA = 0C to +70C 20/16 MHz Min Max 0 145 110 115 115 0 TpC 0 115 110 115 TA = -40C to +105C 20/16 MHz Min Max 0 145 110 115 115 0 TpC 0 115 110 115
No 1 2 3 4 5 6 7 8 9 10 11
Symbol TsDI(DAV) ThDI(DAV) TwDAV TdDAVI(RDY) TdDAVId(RDY) TdRDY0(DAV) TdDO(DAV) TdDAV0(RDY) TdRDY0(DAV) TwRDY TdRDY0d(DAV)
Parameter Data In Setup Time Data In Hold Time Data Available Width DAV Fall to RDY Fall Delay DAV Rise to RDY Rise Delay RDY Rise to DAV Fall Delay Data Out to DAV Fall Delay DAV Fall to RDY Fall Delay RDY Fall to DAV Rise Delay RDY Width RDY Rise to DAV Fall Delay
Data Direction IN IN IN IN IN IN OUT OUT OUT OUT OUT
(c) 1993, 1994, 1995, 1996, 1997 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document.
Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 Telex 910-338-7621 FAX 408 370-8056 Internet: http://www.zilog.com
17

▲Up To Search▲

Price & Availability of Z86C64

	To Download Z86C64 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .